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Fix typos from manual merging.

master
Thomas Kramer 1 month ago
parent
commit
2644d74517
4 changed files with 10 additions and 9 deletions
  1. +1
    -1
      librecell-lib/lclib/characterization/input_capacitance.py
  2. +5
    -4
      librecell-lib/lclib/characterization/ngspice_simulation.py
  3. +3
    -3
      librecell-lib/lclib/characterization/timing_combinatorial.py
  4. +1
    -1
      librecell-lib/lclib/characterization/timing_sequential.py

+ 1
- 1
librecell-lib/lclib/characterization/input_capacitance.py View File

@@ -185,7 +185,7 @@ def measure_input_capacitance(circuit: Circuit,
# Loop because it might be necessary to run a longer simulation.
logger.info("Run simulation.")
while True:
analysis = simulate_circuit(_circuit, input_voltages, time_step=time_step,
analysis = simulate_circuit(_circuit, input_voltages, step_time=time_step,
end_time=period, temperature=temperature,
initial_voltages={active_pin: initial_voltage @ u_V}
)

+ 5
- 4
librecell-lib/lclib/characterization/ngspice_simulation.py View File

@@ -27,11 +27,12 @@ from typing import Any, Dict, Union, Optional

from .piece_wise_linear import PieceWiseLinear

logger = logging.getLogger(__name__)
logger = logging.getLogger(__name__)


def simulate_circuit(circuit: Circuit,
input_voltages: Dict[Any, Union[float, PieceWiseLinear]],
time_step: Second,
step_time: Second,
end_time: Second,
temperature: float = 25,
initial_voltages: Optional[Dict[str, Volt]] = None):
@@ -41,7 +42,7 @@ def simulate_circuit(circuit: Circuit,
:param input_voltages: Dict[node name, input voltage]
Input voltages can either be a `float` for constant values or a `.util.PieceWiseLinearWave`
changing wave forms.
:param time_step: Time step of simulation.
:param step_time: Time step of simulation.
:param end_time: End time of simulation.
:param temperature: Simulation temperature.
:param initial_voltages: Dict[node name, voltage].
@@ -81,7 +82,7 @@ def simulate_circuit(circuit: Circuit,
# Run transient analysis.
# Set use_initial_condition (uic) to False to enable DC bias computation. See ngspice manual 15.2.2 2)
logger.info("Run transient analysis. step_time = {}, end_time = {}".format(step_time, end_time))
analysis = simulator.transient(step_time=time_step,
analysis = simulator.transient(step_time=step_time,
end_time=end_time,
use_initial_condition=False
)

+ 3
- 3
librecell-lib/lclib/characterization/timing_combinatorial.py View File

@@ -99,7 +99,7 @@ def measure_comb_cell(circuit: Circuit,

# Determine length of simulation.
period = max(simulation_duration_hint, input_rise_time + input_fall_time)
logger.debug('Length of simulation: {}'.format(period)
logger.debug('Length of simulation: {}'.format(period))

def _is_signal_stable(signal: np.ndarray, samples_per_period: int, sample_point: float = 1.0,
epsilon: float = 0.01):
@@ -169,7 +169,7 @@ def measure_comb_cell(circuit: Circuit,
__circuit.gnd,
input_wave)

analysis = simulate_circuit(__circuit, input_voltages, time_step=step @ u_s,
analysis = simulate_circuit(__circuit, input_voltages, step_time=step @ u_s,
end_time=period * len(bitsequence), temperature=temperature)

must_be_stable = [analysis[active_pin], analysis[output_net]]
@@ -188,7 +188,7 @@ def measure_comb_cell(circuit: Circuit,
logger.info("Perform high-resolution simulation.")
samples_per_period = int(period / time_step)

analysis = simulate_circuit(__circuit, input_voltages, time_step=time_step,
analysis = simulate_circuit(__circuit, input_voltages, step_time=time_step,
end_time=period * len(bitsequence), temperature=temperature)

time = np.array(analysis.time)

+ 1
- 1
librecell-lib/lclib/characterization/timing_sequential.py View File

@@ -366,7 +366,7 @@ def get_clock_to_output_delay(

samples_per_period = int(period / time_step)
logger.debug("Run simulation.")
analysis = simulate_circuit(_circuit, input_voltages, time_step=time_step,
analysis = simulate_circuit(_circuit, input_voltages, step_time=time_step,
end_time=simulation_end, temperature=temperature)

time = np.array(analysis.time)

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