LibrEDA

The LibrEDA project is focused on creating a libre-software framework for the physical design of silicon chips.

Earth 🌍

Primitive data types and basic routines for Euclidean geometry in the plane. This is developed as a core geometry library of LibrEDA.

Updated 1 day ago

Example router implementation for the LibrEDA framework.

Updated 1 day ago

Example standard-cell placement engine for the LibrEDA-Rust framework. This placement algorithm simulates the movement of electric charges that are sparsely connected by springs (wires).

Updated 2 days ago

Geometric algorithms for the iron-shapes geometry library.

Updated 1 week ago

A minimal place & route flow build on top of the LibrEDA framework and the FreePDK45. This is work-in-progress but already good enough for a demonstration.

Updated 1 week ago

Boolean operations on polygons for the `iron-shapes` crate.

Updated 1 week ago

LibrEDA project web page.

Updated 1 week ago

LEF/DEF input and output module for LibrEDA.

Updated 2 weeks ago

Repository holding the cargo workspace of LibrEDA with all sub-projects. This is meant as a way to distribute the most recent source-code.

Updated 4 weeks ago

Rust and LibrEDA bindings for the TritonRoute detail router.

Updated 4 weeks ago

Verilog netlist parser and writer for LibrEDA. Only supports the structural Verilog syntax as used by Yosys.

Updated 4 weeks ago

Static timing analysis (STA) for netlists of the LibrEDA framework.

Updated 4 weeks ago

ASIC place & route framework. This crate contains interface definitions of the core parts of the place & route flow.

Updated 4 weeks ago

Layout writer and reader for the OASIS stream format.

Updated 4 weeks ago

Design rule checks for the LibrEDA framework.

Updated 4 weeks ago

People