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237 lines
6.2 KiB
C++
237 lines
6.2 KiB
C++
/** @brief <b>Test adc and dma.</b>
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*
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* @author @htmlonly © @endhtmlonly 2022 Enrico Rossi <e.rossi@tecnobrain.com>
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*
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* @version 1.0.0
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*
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* @date 09 December 2022
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*
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* Based on a maple mini board.
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/* Copyright (C) 2022 Enrico Rossi <e.rossi@tecnobrain.com>
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*
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* This software is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 3 of the License, or (at your option) any later version.
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*
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* This software is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library; If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdio.h>
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#include <errno.h>
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#include <libopencm3/stm32/adc.h>
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#include <libopencm3/stm32/dma.h>
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/cm3/nvic.h>
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enum { CH5, CH6, CH7 };
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// Static allocations
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const uint8_t channel_lenght { 3 };
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uint16_t channels[channel_lenght];
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constexpr uint8_t chanlist[channel_lenght] { 5, 6, 7 };
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volatile bool flag;
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// ISR
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void dma1_channel1_isr()
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{
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flag = true;
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if (dma_get_interrupt_flag(DMA1, DMA_CHANNEL1, DMA_TCIF))
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dma_clear_interrupt_flags(DMA1, DMA_CHANNEL1, DMA_TCIF);
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}
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void clock_setup()
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{
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// high-speed external oscillator (HSE) at 8MHz.
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rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ]);
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rcc_periph_clock_enable(RCC_GPIOA); // PA6
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rcc_periph_clock_enable(RCC_GPIOB); // PB1 Led
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rcc_periph_clock_enable(RCC_USART1);
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}
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void gpio_setup()
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{
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// Led
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO1);
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// USART TX
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gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX);
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}
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void usart_setup()
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{
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/* Setup UART parameters. */
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usart_set_baudrate(USART1, 9600);
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usart_set_databits(USART1, 8);
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usart_set_stopbits(USART1, USART_STOPBITS_1);
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usart_set_mode(USART1, USART_MODE_TX);
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usart_set_parity(USART1, USART_PARITY_NONE);
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usart_set_flow_control(USART1, USART_FLOWCONTROL_NONE);
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/* Finally enable the USART. */
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usart_enable(USART1);
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}
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void usart_print(const char *s)
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{
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while (*s)
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usart_send_blocking(USART1, (uint16_t)*s++);
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}
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/** @brief setup the DMA.
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*
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* We are going to use the DMA1 channel 1.
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*
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*/
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void dma_setup()
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{
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// enable IRQ
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// Without this the timer interrupt routine will never be called.
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nvic_enable_irq(NVIC_DMA1_CHANNEL1_IRQ);
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// configure the DMA
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rcc_periph_clock_enable(RCC_DMA1);
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// The channel is disabled and configuration registers are cleared.
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dma_channel_reset(DMA1, DMA_CHANNEL1);
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// Priority.
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//dma_set_priority(DMA1, DMA_CHANNEL1, DMA_CCR_PL_VERY_HIGH);
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dma_set_priority(DMA1, DMA_CHANNEL1, DMA_CCR_PL_LOW);
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/* 16Bit wide transfer for source and destination. */
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// dma_set_memory_size(DMA1, DMA_CHANNEL1, DMA_CCR_MSIZE_32BIT);
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// dma_set_peripheral_size(DMA1, DMA_CHANNEL1, DMA_CCR_PSIZE_32BIT);
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dma_set_memory_size(DMA1, DMA_CHANNEL1, DMA_CCR_MSIZE_16BIT);
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dma_set_peripheral_size(DMA1, DMA_CHANNEL1, DMA_CCR_PSIZE_16BIT);
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/*
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* After every 32bits we have to increase the address because
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* we use RAM.
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*/
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// dma_enable_peripheral_increment_mode(DMA1, DMA_CHANNEL1);
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//dma_disable_peripheral_increment_mode(DMA1, DMA_CHANNEL1); // should be default
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dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL1);
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dma_enable_circular_mode(DMA1, DMA_CHANNEL1);
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/* We define the source as peripheral. */
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dma_set_read_from_peripheral(DMA1, DMA_CHANNEL1);
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/* We want to transfer ADC Data Register. */
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dma_set_peripheral_address(DMA1, DMA_CHANNEL1, (uint32_t)&ADC1_DR);
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/* Destination should be the channels array. */
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dma_set_memory_address(DMA1, DMA_CHANNEL1, (uint32_t)channels);
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/*
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* Set number of DATA to transfer.
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* Remember that this means not necessary bytes but MSIZE or PSIZE
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* depending on your source device.
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*/
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dma_set_number_of_data(DMA1, DMA_CHANNEL1, channel_lenght);
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dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL1);
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/* Start DMA transfer. */
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dma_enable_channel(DMA1, DMA_CHANNEL1);
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}
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/**
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* Initialize the ADC1.
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*
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* @warning: rcc_periph_clock_enable(RCC_GPIOA);
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*/
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void adc_setup()
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{
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gpio_set_mode(GPIOA,
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GPIO_MODE_INPUT,
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GPIO_CNF_INPUT_ANALOG,
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GPIO5 | GPIO6 | GPIO7);
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rcc_periph_clock_enable(RCC_ADC1);
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adc_power_off(ADC1); // Make sure the ADC doesn't run during config.
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dma_setup();
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/* rcc_peripheral_reset + rcc_peripheral_clear_reset */
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rcc_periph_reset_pulse(RST_ADC1);
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/* Prescaler */
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rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV6);
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/* Independent mode */
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// adc_set_dual_mode(ADC_CR1_DUALMOD_IND);
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/* Scan mode */
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// adc_disable_scan_mode(ADC1); // convert only 1 channel
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adc_enable_scan_mode(ADC1); // scan channels mode (DMA required)
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/* configure for one single conversion. */
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adc_set_single_conversion_mode(ADC1);
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// F1 software trigger mandatory
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adc_enable_external_trigger_regular(ADC1, ADC_CR2_EXTSEL_SWSTART);
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// adc_disable_external_trigger_regular(ADC1);
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/* alignment */
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adc_set_right_aligned(ADC1);
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// adc_set_sample_time(ADC1, ADC_CHANNEL6, ADC_SMPR_SMP_239DOT5CYC);
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adc_set_sample_time_on_all_channels(ADC1, ADC_SMPR_SMP_239DOT5CYC);
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adc_set_regular_sequence(ADC1, channel_lenght, (uint8_t*)chanlist);
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adc_enable_dma(ADC1);
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adc_power_on(ADC1);
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adc_reset_calibration(ADC1);
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adc_calibrate(ADC1);
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}
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int main() {
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const uint8_t bsize { 255 };
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char buffer[bsize]; // generic buffer
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clock_setup();
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gpio_setup();
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usart_setup();
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adc_setup();
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usart_print("Test Maple ADC and DMA.\r\n");
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// Toggle the LED on and off forever
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while (1) {
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gpio_toggle(GPIOB, GPIO1); // LED on/off
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flag = false;
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adc_start_conversion_regular(ADC1);
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while (!flag); // Wait until DMA IRQ.
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sprintf(buffer, "ADC1 [ch5, ch6, ch7]: %4d, %4d, %4d\n",
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channels[CH5], channels[CH6], channels[CH7]);
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usart_print(buffer);
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for (long int i = 0; i < 1000000; i++) // Wait a bit.
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__asm__("nop");
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}
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return 0;
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}
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