LibrEDA project web page.
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Copyright (c) 2020-2021 Thomas Kramer.
This file is part of librEDA
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU Affero General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
GNU Affero General Public License for more details.
You should have received a copy of the GNU Affero General Public License
along with this program. If not, see <>.
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<div id="content" class="flexvertical">
<h1><img src="img/libreda_logo_square.svg" height="40px" style="margin-bottom: -5px"/> LibrEDA</h1>
<i>Libre Electronic Design Automation</i>
<div class="box" >
LibrEDA is a young libre-software framework for the physical design of silicon chips.
The project pushes towards democratization of silicon technology by making ASIC toolchains easily accessible for research, education and hobbyists.
<li><a href="">Main Page</a></li>
<li><a href="">Code</a></li>
<li><a href="">Examples</a></li>
<li><a href="">NLNet project page</a></li>
Side projects:
<li><a href="">LibreCell - Standard-cell generator and characterization tool</a></li>
The Rust software framework currently features most basic components. This includes input/output for common file formats (OASIS, LEF/DEF, ...) as well as example implementations of algorithms for standard-cell placement, legalization and routing. <br />
<a href=""><img src="./img/libreda_shapes_logo_square.svg" title="shapes: geometric primitives" width="64px" /></a>
<a href=""><img src="./img/libreda_db_logo_square.svg" title="libreda-db: Data structures for layouts and netlists." width="64px" /></a>
<a href=""><img src="./img/libreda_oasis_logo_square.svg" title="libreda-oasis: Layout I/O in the OASIS format." width="64px" /></a>
<a href=""><img src="./img/libreda_electron_logo_square.svg" title="electron-placer: Example standard-cell placer." width="64px" /></a>
<a href=""><img src="./img/libreda_tetris_logo_square.svg" title="tetris-legalizer: Example standard-cell legalizer." width="64px" /></a>
<a href=""><img src="./img/libreda_mycelium_logo_square.svg" title="mycelium-router: Example routing algorithm." width="64px" /></a>
<h2>Example Output</h2>
Illustration of a simple digital chip layout created with the framework. The most visible parts are the wires that connect the standard-cells.
<img src="./img/place_and_route_illustration.png" title="Illustration of placed and routed design with 1600 cells. FreePDK45." width="256px" />
<div id="acknowledgements" class="box">
This project is funded by <a href="">NLNet and NGI0</a>
<a href=""><img src="./img/nlnet.nl_banner.svg" alt="Logo NLnet: abstract logo of four people seen from above" height="64" /></a>
<a href=""><img src="./img/NGI0_tag.svg" alt="Logo NGI Zero: letterlogo shaped like a tag" height="64" /></a>
This project was funded through the <a href="">NGI0 PET</a> Fund,
a fund established by NLnet with financial support from the European
Commission's <a href="">Next Generation Internet</a>
programme, under the aegis of DG Communications Networks, Content and
Technology under grant agreement No 825310.
<div id="footer">
<a href="">Source Code</a>
<a href="./imprint.html">Imprint/Impressum</a>