A minimal place & route flow build on top of the LibrEDA framework and the FreePDK45. This is work-in-progress but already good enough for a demonstration. https://libreda.org
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Example flow

This example flow demonstrates how the LibrEDA framework can be used. It is not complete nor does it target any real technology.

Currently the flow is very mininmal.

Inputs are:

  • A directory with the layouts of the standard-cells in the OASIS format.
  • A verilog file with the interface definitions of the standard-cells.
  • A gate-level netlist of the circuit.

Output is a placed and routed layout.

Run the example flow.

First clone the full LibrEDA framework. The framework consists of multiple repositories that are bundled together in the 'workspace' repository.

git clone --recursive https://codeberg.org/LibrEDA/libreda-rs-workspace
cd libreda-rs-workspace/libreda-examples
# A --release flag can be added after 'run' for faster execution but slower compilation.
RUST_LOG=info cargo run \
    --bin libreda-example -- \
    --cell-layouts test/data/oas/ \
    --cell-library test/data/gscl45nm_interfaces.v \
    --lef test/data/gscl45nm.lef \
    --netlist test/data/comb_chip_45_nl.v \
    --top my_chip \
    --height 50000 --width 50000 \
    --output test/example_output.oas