Core traits and data types for representation and manipulation of logic functions.
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Parallel graph processing using an operator formulation.
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Fast lookup-table based computation of rectilinear Steiner minimal trees (RSMT).
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Repository holding the cargo workspace of LibrEDA with all sub-projects. This is meant as a way to distribute the most recent source-code.
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Boolean operations on polygons for the `iron-shapes` crate.
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The ultimate guide through LibrEDA.
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Layout and netlist data structures for the Rust LibrEDA framework.
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Simple library for parsing data from iterators.
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Primitive data types and basic routines for Euclidean geometry in the plane. This is developed as a core geometry library of LibrEDA.
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Rust crate of a parser and writer for the 'liberty' format which is used to describe the timing behavior of CMOS standard-cells.
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Static timing analysis (STA) for netlists of the LibrEDA framework.
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Verilog netlist parser and writer for LibrEDA. Only supports the structural Verilog syntax as used by Yosys.
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