You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
|
10 months ago | |
---|---|---|
.. | ||
DXF | 2 years ago | |
Gerber | 2 years ago | |
PCIe-Adapter.pretty | 2 years ago | |
2 years ago | ||
Back.png | 2 years ago | |
Front.png | 2 years ago | |
PCIe-Adapter-cache.lib | 2 years ago | |
PCIe-Adapter.kicad_pcb | 10 months ago | |
PCIe-Adapter.kicad_pcb-bak | 10 months ago | |
PCIe-Adapter.net | 2 years ago | |
PCIe-Adapter.pro | 2 years ago | |
PCIe-Adapter.sch | 2 years ago | |
PCIe-Adapter.sch-bak | 2 years ago | |
PCIe.dcm | 2 years ago | |
PCIe.lib | 2 years ago | |
PCIe_RX.sch | 2 years ago | |
PCIe_RX.sch-bak | 2 years ago | |
README.md | 2 years ago | |
Si5325.dcm | 2 years ago | |
Si5325.lib | 2 years ago | |
clock.sch | 2 years ago | |
clock.sch-bak | 2 years ago | |
fp-info-cache | 1 year ago | |
fp-lib-table | 2 years ago | |
sym-lib-table | 2 years ago |
README.md
ECP5 EVN to PCIe x4 adapter board
This is an adapter board for the ECP5 EVN, such that it can be used with PCIe x1 or x4. It has a PLL to double the incoming PCIe clock, since it has better jitter performance than the ones in the ECP5. It also has an ATMega328 which is connected over UART to the ECP5 to save on interface pins and FPGA logic complexity for configuring the PLL.